In a receiver and the like for wireless communication such as mobile communication, a direct conversion (zero IF) method is a desirable reception method. Being simple in circuit configuration and requiring no IF (Intermediate Frequency) filter, the direct conversion method can realize cost reduction.
However, a typical direct conversion receiver that has been conventionally used mixes local oscillation signals having the same frequency as that of an inputted high-frequency signal (reception signal) to take out a desired low-frequency signal. Consequently, a DC offset occurs due to local self-mixing using the signals with the same frequency, and by this DC offset, a subsequent-stage circuit may possibly be saturated to stop its operation.
One method to avoid this problem is a method of using an even harmonic mixer in order to reduce the occurring DC offset. The even harmonic mixer reduces a DC offset by using, as local oscillation signals, signals having a ½ frequency of a frequency of a reception signal and having a 90° phase difference from (orthogonal to) each other, that is, by using the local oscillation signals different in frequency from the reception signal.
FIG. 11 is a diagram showing the configuration of the even harmonic mixer.
In FIG. 11, a down converter 61 receives a reception signal (high-frequency signal) RFIN and local oscillation signals LO0, LO90 and mixes them to output an I-channel signal ICH. Similarly, a down converter 62 receives the reception signal RFIN and local oscillation signals LO45, LO135 and mixes them to output a Q-channel signal QCH.
A phase shift circuit 63 generates and outputs the local oscillation signals LO0, LO90, LO45, LO135 based on a signal LOI whose frequency is ½ of a frequency of the signal RFIN. Among the local oscillation signals LO0, LO90, LO45, LO135 in which the signals LO0 and LO90 constitute one set and the signals LO45 and LO135 constitute one set, signals in the same set have a 90° phase difference and corresponding signals in different sets have a 45° phase difference.
As a 45° phase shifter generating signals having a 45° phase difference, that using a CR network constituted of resistors (R) and capacitors (C) has been known (see, for example, a non-patent document 1).
FIG. 12 is a diagram showing a configuration example of a primary CR-type 45° phase shifter 64 using a CR network. In FIG. 12, the primary CR-type 45° phase shifter 64 having resistors R61˜R64 and capacitors C61˜C64 is shown as an example.
As shown in FIG. 12, in the primary CR-type 45° phase shifter 64, circuits each constituted of one resistor and one capacitor connected in series are connected in parallel between signals lines of input signals IN, INX. Resistance values of the resistors R61 and R63 are equal to each other and resistance values of the resistors R62 and R64 are equal to each other. Further, capacitance values of the capacitors C61 and C63 are equal to each other and capacitance values of the capacitors C62 and C64 are equal to each other.
By appropriately designing the resistance values of the resistors R61˜R64 and the capacitance values of the capacitors C61˜C64, signals OUT0, OUT180, OUT45, and OUT225 whose phases are deviated (whose phases are rotated) from phases of the input signals by predetermined amounts are outputted from respective junctions between the resistors and the capacitors connected in series. For example, the signal OUT0 is outputted from a circuit constituted of the resistor R61 and the capacitor C61, and the signal OUT45 having a 45° phase difference from the signal OUT0 is outputted from a circuit constituted of the resistor R62 and the capacitor C62.
FIG. 13 is a chart showing a frequency characteristic of a phase difference in the primary CR-type 45° phase shifter shown in FIG. 12, the horizontal axis showing frequency and the vertical axis showing phase difference (in a unit of degree) from a reference signal. FIG. 13 shows a frequency characteristic in which a frequency (center frequency) corresponding to a phase difference of 45° is set to 1 GHz.
In the primary CR-type phase shifter 64, a phase difference (a rotation amount of a phase) of a signal for a given frequency is determined by the resistance value of the resistor and the capacitance value of the capacitor constituting the phase shifter. Therefore, even if the primary CR-type 45° phase shifter 64 is designed so that a desired frequency characteristic is obtained, the resistance values of the resistors and the capacitance values of the capacitors are actually influenced by manufacturing (process) variation and parasitic components, so that a 45° phase difference cannot be obtained, or a phase error occurs because the frequency for which the phase difference becomes 45° is shifted. For example, if an about 3° phase error is allowed in a primary CR-type 45° phase shifter having the frequency characteristic shown in FIG. 13, a frequency range becomes about 700 MHz˜1500 MHz, which cannot be said to be sufficient considering actual manufacturing variation and so on.
Further, in the even harmonic mixer, phase shift accuracy relating to the local oscillation signals supplied to the down converters 61, 62 (accuracy of a phase difference between the oscillation signals) directly and greatly influences quality of the reception signal. Therefore, in order to improve performance of the even harmonic mixer to enable high-quality data communication, there is a demand for improving accuracy of 45° phase difference signals. However, in a conventional method, it is extremely difficult to constantly obtain sufficient accuracy of a phase difference of signals over a wide band, due to manufacturing variation or the like of resistors and capacitors constituting a phase shifter or the like.
Incidentally, regarding orthogonal phase signals (90° phase difference signals), proposed is a method of eliminating a phase error by 90° phase correction (for example, see a patent document 1). However, this method cannot be applied directly to 45° phase difference signals.
Patent document 1: Japanese Patent Application Laid-open No. Hei 5-110369 Non-patent document 1: T. Yamaji, H. Tanimoto, and H. Kokatsu, “An I/Q Active Balanced Harmonic Mixer with IM2 Cancelers and a 45° Phase Shifter”, IEEE Journal OF SOLID-STATE CIRCUITS, VOL. 33, NO. 12, pp. 2240-2246, DECEMBER 1998